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Size: a a a
2021 April 02
2021 April 03
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Captcha solved, user verified.
Welcome to the group, Evgeny2
Welcome to the group, Evgeny2
2021 April 20
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out of topic question.
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any of you use ubuntu as your primary operating system?
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Which is your cross-platform note-taking application?
2021 April 21
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Pen and paper
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😂
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stone and sand
2021 April 22
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hi everyone, for high performance ddr at 62.5MHz which clock resource is recommended and why? pll or mmcm?
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I'm sorry, a little context, in my application I've implemented the same scheme with both but mmcm doesnt works as well as the pll
2021 April 23
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I am not very sure because it has been a long time since I use a der IP. I remembered XilinX MIG should use a clock reference clock directly from a clock port which means you can’t use a generated clock.
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So you may need a PLL outside FPGA
2021 April 27
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Hey
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I just started fpga
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I want to be a fpga designer
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But absolutely no idea where to stsrt
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I joined a course in Coursera
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Introduction to fpga for embedded systems
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Half way through it