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FPGA technical questions

449 membersпожаловаться на группу
2020 December 07

MH

Muhammad Haris in FPGA technical questions
124 online and no one's reply me 😐
источник
20:59пожаловаться#1

DG

Denis Gabidullin in FPGA technical questions
Muhammad Haris
124 online and no one's reply me 😐
Banned
источник
21:03пожаловаться#2

3

3FoH9l in FPGA technical questions
0669
источник
23:27пожаловаться#3
2020 December 10

A

AMD in FPGA technical questions
Hey guys, has anyone  worked on SATA( SERIAL AT ATTACHEMENT) ?
источник
08:45пожаловаться#4
2020 December 18

s

shanmukhah in FPGA technical questions
i am looking information about nand flash memory controller design?
источник
10:46пожаловаться#5
2020 December 22

ا

اقوال in FPGA technical questions
hi
i it possible to program zynq with this jlink?
источник
15:03пожаловаться#6

K

Konstantin in FPGA technical questions
اقوال
hi
i it possible to program zynq with this jlink?
Yes :)
источник
15:44пожаловаться#7
2020 December 23

A

Andrey S in FPGA technical questions
https://forums.xilinx.com/t5/Embedded-Development-Tools/Debugging-Zynq-7020-with-Xilinx-SDK-Segger-JLink/td-p/1031330
Xilinx
Debugging Zynq-7020 with Xilinx SDK + Segger JLink
Hello, Hopefully this is the right place to ask. I have a Picozed 7020 board that I am currently debugging with using the Digilent JTAG-HS3 programming cable. I would like to use the Segger JLink hardware to debug my bare-metal applications on the two cortex's instead, so I bought the JLink's Xilinx...
источник
01:36пожаловаться#8

A

AMD in FPGA technical questions
Hey pals, can anyone clear my doubts, It's like when I loaded my bit file & trying to monitor the signals of my design, I've noticed that, sometimes my  FSM  executes correctly but another it's(fsm)  enter into undefined state.
Anyone explain me why this is happening. ....
источник
15:39пожаловаться#9

A

AMD in FPGA technical questions
AMD
Hey pals, can anyone clear my doubts, It's like when I loaded my bit file & trying to monitor the signals of my design, I've noticed that, sometimes my  FSM  executes correctly but another it's(fsm)  enter into undefined state.
Anyone explain me why this is happening. ....
Monitoring through chipscope*
источник
15:40пожаловаться#10

K

Konstantin in FPGA technical questions
AMD
Hey pals, can anyone clear my doubts, It's like when I loaded my bit file & trying to monitor the signals of my design, I've noticed that, sometimes my  FSM  executes correctly but another it's(fsm)  enter into undefined state.
Anyone explain me why this is happening. ....
Have a look at the line #34,  inside the control process
источник
15:42пожаловаться#11

A

AMD in FPGA technical questions
Konstantin
Have a look at the line #34,  inside the control process
Control process?..
I'm sorry couldn't get that..
Can explain with some more clarity
источник
15:52пожаловаться#12

K

Konstantin in FPGA technical questions
AMD
Control process?..
I'm sorry couldn't get that..
Can explain with some more clarity
Yeah, same as me
источник
16:06пожаловаться#13
2020 December 24

S

Sᕼϒᙢᗩᗩ Qᗩᔕᓰᙢ... in FPGA technical questions
Hi
Please l need book ( advanced embedded FPGA systems)
источник
17:26пожаловаться#14

A

Andrew in FPGA technical questions
Is it a title ?
источник
23:09пожаловаться#15
2020 December 25

E

Egor in FPGA technical questions
Konstantin
Yeah, same as me
🤣
источник
11:10пожаловаться#16
2020 December 27

S

Sᕼϒᙢᗩᗩ Qᗩᔕᓰᙢ... in FPGA technical questions
anything about fpga
источник
10:48пожаловаться#17

S

Sᕼϒᙢᗩᗩ Qᗩᔕᓰᙢ... in FPGA technical questions
Like this
источник
10:48пожаловаться#18

Д

Даня in FPGA technical questions
Sᕼϒᙢᗩᗩ Qᗩᔕᓰᙢ
Hi
Please l need book ( advanced embedded FPGA systems)
Best fpga systems: https://fpga-systems.ru
источник
11:34пожаловаться#19
2021 January 05

S

S@M in FPGA technical questions
Hello everybody ..
I synthesized an algorithm on ISE xilinx bit i don’t know how to calculate the total running time (connection time) of it ..
Please, can u help me ?!
источник
01:51пожаловаться#20