Телеграмм чат группы proFpga страница 172

There's no embedded timer in MB core, so you don't have sleep() out-of-box. You should first add timer core inside your SoC design. http://zedboard.org/content/using-timer-when-running-c-program-bare-metal Google for XTmrCtr TimerCounterInst

zedboard.org

Using a timer when running a C program as 'bare metal'

Hi, I'm trying to run a benchmark-like algoritm on the zedboard using the SDK (like the helloWorld program in the labs here on ZedBoard.org). My poblem is that when i'm trying to get the time,

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11:44пожаловаться #6

Jeremy in FPGA technical questions

thanks

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14:45пожаловаться #7

2019 December 13

Muhammad in FPGA technical questions

Hey guys, have one doubt in SATA, In LBA address we usually give sector address right, instead is that possible to give offset address( byte address) in LBA field for any read or write?

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06:37пожаловаться #8

Max in FPGA technical questions

no, as a understand, minimal addressation unit in sata is LBA. we doesn't can addressation for word/dword. LBA = 512 bytes. In sata acs, in sata specification we can't using less than LBA.

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08:50пожаловаться #9

Max in FPGA technical questions

for example, if i send READ DMA command (as declared in SATA ACS-3), i write LBA (start address if i read multiple sectors), and i write sector count field (usually, its value limited for 16 sectors), device, which presented as SATA M.2 SSD return me 8192 bytes readed data, which presented as zeros. Write command never executed before this operation. SSD is clear(because its new)

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08:57пожаловаться #10

Max in FPGA technical questions

sata phy/ll/tl layers doesn't oriented write/read byte addresation. however, you might realize this manually

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08:59пожаловаться #11

Muhammad in FPGA technical questions

Max

no, as a understand, minimal addressation unit in sata is LBA. we doesn't can addressation for word/dword. LBA = 512 bytes. In sata acs, in sata specification we can't using less than LBA.

Thanks pal, u just clarified my doubts😊

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14:21пожаловаться #12

2019 December 14

72056 Sumer S.Hardan in FPGA technical questions

Hi
I have spartan 3a and siul8nk model in matlab , I want to make hardwear co_simulation
How can do that?

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17:48пожаловаться #13

72056 Sumer S.Hardan in FPGA technical questions

Mistake

Siul8nk=simulink

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17:49пожаловаться #14