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2021 August 26
2021 August 28
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Hi all ... We want to interface an ov5640 camera by xilinx Spartan 6 FPGA ... And I implement sccb protocol but we can not give any response ... Can you help me ?
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MU
Is it possible to code with vhdl in vivado or do we need to use an external editor
MU
Internet only shows methods to design a block level system
MU
Can anyone please help
ПШ
Yes, it is possible. You can both edit vhdl files in vivado or use external editor, as you wish.
MU
Is there any reference material
MU
There is no valid guide in internet
2021 August 29
A
Just create a file and put your code there. What kind of guidance do you expect?
2021 September 07
NH
You can go to visit Xilinx website to get the reference guide
There is a HDL library guide that may be useful to you
There is a HDL library guide that may be useful to you
2021 September 15
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Hi everyone, I wish to use version control system ( like git) with xilinx-vivado. Please guide me with the same. As we modify RTL codes with changing requirements, it will be good to use version control.
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And there is a Xilinx ug document has some instructions. But I don't have it in handy..
2021 September 16
H
Ok thanks
K
the general idea - you better do not store xilinx project in vcs. Store the tcl scripts that builds the project and block design