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FPGA technical questions

2020 May 05

AE

Abdalwahab Essa in FPGA technical questions
Thank you sir
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AE

Abdalwahab Essa in FPGA technical questions
Leonid Ivanov
More over, I think they are included somewhere in SDK
Thank you sir
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2020 May 06

3

3xploit in FPGA technical questions
5424
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T

The Join Captcha Bot in FPGA technical questions
Captcha solved, user verified.
Welcome to the group ‎@Exploit1337
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MK

Murali Kumar in FPGA technical questions
Thanks
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2020 May 07

K

Konstantin in FPGA technical questions
Hi guys,
Does anyone already use FHDL language?
https://m-labs.hk/migen/manual/fhdl.html

I need someone to have a chat about FHDL language opportunities, pro and cons :)
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2020 May 08

A

Andrew in FPGA technical questions
Does any convenient toolchain exist, which supports this language?
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K

Konstantin in FPGA technical questions
Andrew
Does any convenient toolchain exist, which supports this language?
It just produce plain verilog for you and you can feed it into any toolflow ( synth and sim).
The question is about the quality of this verilog
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2020 May 09

pp

promach promach in FPGA technical questions
Переслано от promach promach
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3

3xploit in FPGA technical questions
hey guys , i have this code and i am compiling it without errors but when i want to do analysis and synthesis i get error that operator "=" is not determinated https://pastebin.com/9zusrm1K
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3

3xploit in FPGA technical questions
i am trying to learn vhdl so any tips are welcome 🙂
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3

3xploit in FPGA technical questions
either waveform doesnt find any nodes 😕//
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3

3xploit in FPGA technical questions
i am using quartus ii
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P

Pablo in FPGA technical questions
I am not 100% sure but if I remember correctly "" (double quotes) is for std_logic_vector and your signal is a std_logic.
Try with:.  operation = '1' (single quotes)
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3

3xploit in FPGA technical questions
Pablo
I am not 100% sure but if I remember correctly "" (double quotes) is for std_logic_vector and your signal is a std_logic.
Try with:.  operation = '1' (single quotes)
it has double quotes at the documentation but i will try
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3

3xploit in FPGA technical questions
awesome 🙂
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P

Pablo in FPGA technical questions
🙂
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2020 May 10

3

3xploit in FPGA technical questions
seems that i have same error after adding another elsif inside the code , now i cant even compile
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2020 May 12

T

The Join Captcha Bot in FPGA technical questions
@John_Locke_420 has not completed the captcha in time. "User" was kicked out.
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2020 May 13

T

The Join Captcha Bot in FPGA technical questions
‎Simanta Cheung has not completed the captcha in time. "User" was kicked out.
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