Просьба внесите ясность:
Мои коллеги утверждают, что писать/читать данные в кэш процессора на уровне пользователя - невозможно. Нутром чую, что они заблуждаются, но обосновать не могу.
Кто прав?
Если я верно интерпретирую спецификацию на процессор, то можно:
Namespaces:
MCA::L2
3.2.5.3 [L2] MCA::L3
3.2.5.7 [L3 Cache]
MSRC000_20[7...A]9 [L3 Deferred Error Address] (MCA::L3::MCA_DEADDR_L3) Reset: Cold,0000_0000_0000_0000h. The MCA::L3::MCA_DEADDR_L3 register stores the address associated with the error in MCA::L3::MCA_DESTAT_L3. The register is only meaningful if MCA::L3::MCA_DESTAT_L3[Val]=1 and MCA::L3::MCA_DESTAT_L3[AddrV]=1. The lowest valid bit of the address is defined by MCA::L3::MCA_DEADDR_L3[LSB]. _ccx0_inst7_aliasMSR; MSRC000_2079 _ccx0_inst8_aliasMSR; MSRC000_2089 _ccx0_inst9_aliasMSR; MSRC000_2099 _ccx0_inst10_aliasMSR; MSRC000_20A9 Bits Description 63:62 Reserved. 61:56 LSB. Read-write,Volatile. Reset: Cold,00h. Specifies the least significant valid bit of the address contained in MCA::L3::MCA_DEADDR_L3[ErrorAddr]. A value of 0 indicates that MCA::L3::MCA_DEADDR_L3[55:0] contains a valid byte address. A value of 6 indicates that MCA::L3::MCA_DEADDR_L3[55:6] contains a valid cache line address and that MCA::L3::MCA_DEADDR_L3[5:0] are not part of the address and should be ignored by error handling software. A value of 12 indicates that MCA::L3::MCA_DEADDR_L3[55:12] contain a valid 4KB memory page and that MCA::L3::MCA_DEADDR_L3[11:0] should be ignored by error handling software. 55:0 ErrorAddr. Read-write,Volatile. Reset: Cold,00_0000_0000_0000h. Contains the address, if any, associated with the error logged in MCA::L3::MCA_DESTAT_L3. The lowest-order valid bit of the address is specified in MCA::L3::MCA_DEADDR_L3[LSB]. MSRC001_040[7...A] [L3 Machine Check Control Mask] (MCA::L3::MCA_CTL_MASK_L3)