The Current Program Status Register (CPSR) has the following 32 bits.[87]

    M (bits 0–4) is the processor mode bits.
    T (bit 5) is the Thumb state bit.
    F (bit 6) is the FIQ disable bit.
    I (bit 7) is the IRQ disable bit.
    A (bit 8) is the imprecise data abort disable bit.
    E (bit 9) is the data endianness bit.
    IT (bits 10–15 and 25–26) is the if-then state bits.
    GE (bits 16–19) is the greater-than-or-equal-to bits.
    DNM (bits 20–23) is the do not modify bits.
    J (bit 24) is the Java state bit.
    Q (bit 27) is the sticky overflow bit.
    V (bit 28) is the overflow bit.
    C (bit 29) is the carry/borrow/extend bit.
    Z (bit 30) is the zero bit.
    N (bit 31) is the negative/less than bit.